1. Field of the Invention
The present invention is generally related to multi-threaded processors. More particular, the present invention is directed towards multi-threaded processors having dedicated execution units for executing thread instructions.
2. Description of the Related Art
Multi-threaded processors are of increasing interest in a variety of applications. A multi-threaded processor has multiple threads for processing information. For example, multi-threaded processors are of interest for use in Graphics Processing Units (GPUs).
A GPU commonly includes stages dedicated to performing specified functions. An emerging problem is designing a multi-threaded GPU architecture that efficiently utilizes GPU resources, such as execution pipelines.
Therefore, what is desired is an improved multi-threaded processor architecture, and a new method and apparatus for qualifying and prioritizing instructions for execution by the threads.